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Error Coding for Arithmetic Processors

Author : T.R.N. Rao
Publisher : Elsevier
Page : 233 pages
File Size : 45,41 MB
Release : 1974-01-01
Category : Technology & Engineering
ISBN : 0323162282

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Error Coding for Arithmetic Processors provides an understanding of arithmetically invariant codes as a primary technique of fault-tolerant computing by discussing the progress in arithmetic coding theory. The book provides an introduction to arithmetic error code, single-error detection, and long-distance codes. It also discusses algebraic structures, linear congruences, and residues. Organized into eight chapters, this volume begins with an overview of the mathematical background in number theory, algebra, and error control techniques. It then explains the basic mathematical models on a register and its number representation system. The reader is also introduced to arithmetic processors, as well as to error control techniques. The text also explores the functional units of a digital computer, including control unit, arithmetic processor, memory unit, program unit, and input/output unit. Students in advanced undergraduate or graduate level courses, researchers, and readers who are interested in applicable knowledge on arithmetic codes will find this book extremely useful.

Concurrent Error Detecting Codes for Arithmetic Processors

Author : National Aeronautics and Space Administration (NASA)
Publisher : Createspace Independent Publishing Platform
Page : 28 pages
File Size : 43,61 MB
Release : 2018-07-25
Category :
ISBN : 9781724269430

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A method of concurrent error detection for arithmetic processors is described. Low-cost residue codes with check-length l and checkbase m = 2 to the l power - 1 are described for checking arithmetic operations of addition, subtraction, multiplication, division complement, shift, and rotate. Of the three number representations, the signed-magnitude representation is preferred for residue checking. Two methods of residue generation are described: the standard method of using modulo m adders and the method of using a self-testing residue tree. A simple single-bit parity-check code is described for checking the logical operations of XOR, OR, and AND, and also the arithmetic operations of complement, shift, and rotate. For checking complement, shift, and rotate, the single-bit parity-check code is simpler to implement than the residue codes. Lim, R. S. Ames Research Center NASA-TP-1528, A-7810 RTOP 366-18-50-00-00

Error Correcting Codes

Author : D J. Baylis
Publisher : Routledge
Page : 238 pages
File Size : 22,91 MB
Release : 2018-05-11
Category : Mathematics
ISBN : 1351449834

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Assuming little previous mathematical knowledge, Error Correcting Codes provides a sound introduction to key areas of the subject. Topics have been chosen for their importance and practical significance, which Baylis demonstrates in a rigorous but gentle mathematical style.Coverage includes optimal codes; linear and non-linear codes; general techniques of decoding errors and erasures; error detection; syndrome decoding, and much more. Error Correcting Codes contains not only straight maths, but also exercises on more investigational problem solving. Chapters on number theory and polynomial algebra are included to support linear codes and cyclic codes, and an extensive reminder of relevant topics in linear algebra is given. Exercises are placed within the main body of the text to encourage active participation by the reader, with comprehensive solutions provided.Error Correcting Codes will appeal to undergraduate students in pure and applied mathematical fields, software engineering, communications engineering, computer science and information technology, and to organizations with substantial research and development in those areas.

Error Detecting Codes, Self-checking Circuits and Applications

Author : John F. Wakerly
Publisher : North Holland
Page : 256 pages
File Size : 16,5 MB
Release : 1978
Category : Business & Economics
ISBN :

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Error-detecting codes; Self-checking circuits; Data paths and memory; Arithmetic operations; Logical operations; Microprogrammed control units; Example design of a self-checking processor.

Advanced Hardware Design for Error Correcting Codes

Author : Cyrille Chavet
Publisher : Springer
Page : 197 pages
File Size : 42,93 MB
Release : 2014-10-30
Category : Technology & Engineering
ISBN : 3319105698

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This book provides thorough coverage of error correcting techniques. It includes essential basic concepts and the latest advances on key topics in design, implementation, and optimization of hardware/software systems for error correction. The book’s chapters are written by internationally recognized experts in this field. Topics include evolution of error correction techniques, industrial user needs, architectures, and design approaches for the most advanced error correcting codes (Polar Codes, Non-Binary LDPC, Product Codes, etc). This book provides access to recent results, and is suitable for graduate students and researchers of mathematics, computer science, and engineering. • Examines how to optimize the architecture of hardware design for error correcting codes; • Presents error correction codes from theory to optimized architecture for the current and the next generation standards; • Provides coverage of industrial user needs advanced error correcting techniques. Advanced Hardware Design for Error Correcting Codes includes a foreword by Claude Berrou.